|
| enum | Diligent::VALUE_TYPE : Uint8 {
Diligent::VT_UNDEFINED = 0
, Diligent::VT_INT8
, Diligent::VT_INT16
, Diligent::VT_INT32
,
Diligent::VT_UINT8
, Diligent::VT_UINT16
, Diligent::VT_UINT32
, Diligent::VT_FLOAT16
,
Diligent::VT_FLOAT32
, Diligent::VT_FLOAT64
, Diligent::VT_NUM_TYPES
} |
| | Value type. More...
|
| |
| enum | Diligent::SHADER_TYPE : Uint32 {
Diligent::SHADER_TYPE_UNKNOWN = 0x0000
, Diligent::SHADER_TYPE_VERTEX = 0x0001
, Diligent::SHADER_TYPE_PIXEL = 0x0002
, Diligent::SHADER_TYPE_GEOMETRY = 0x0004
,
Diligent::SHADER_TYPE_HULL = 0x0008
, Diligent::SHADER_TYPE_DOMAIN = 0x0010
, Diligent::SHADER_TYPE_COMPUTE = 0x0020
, Diligent::SHADER_TYPE_AMPLIFICATION = 0x0040
,
Diligent::SHADER_TYPE_MESH = 0x0080
, Diligent::SHADER_TYPE_RAY_GEN = 0x0100
, Diligent::SHADER_TYPE_RAY_MISS = 0x0200
, Diligent::SHADER_TYPE_RAY_CLOSEST_HIT = 0x0400
,
Diligent::SHADER_TYPE_RAY_ANY_HIT = 0x0800
, Diligent::SHADER_TYPE_RAY_INTERSECTION = 0x1000
, Diligent::SHADER_TYPE_CALLABLE = 0x2000
, Diligent::SHADER_TYPE_TILE = 0x4000
,
SHADER_TYPE_LAST = SHADER_TYPE_TILE
, Diligent::SHADER_TYPE_VS_PS
, Diligent::SHADER_TYPE_ALL_GRAPHICS
, Diligent::SHADER_TYPE_ALL_MESH
,
Diligent::SHADER_TYPE_ALL_RAY_TRACING
, Diligent::SHADER_TYPE_ALL = SHADER_TYPE_LAST * 2 - 1
} |
| | Describes the shader type. More...
|
| |
| enum | Diligent::BIND_FLAGS : Uint32 {
Diligent::BIND_NONE = 0
, Diligent::BIND_VERTEX_BUFFER = 1u << 0u
, Diligent::BIND_INDEX_BUFFER = 1u << 1u
, Diligent::BIND_UNIFORM_BUFFER = 1u << 2u
,
Diligent::BIND_SHADER_RESOURCE = 1u << 3u
, Diligent::BIND_STREAM_OUTPUT = 1u << 4u
, Diligent::BIND_RENDER_TARGET = 1u << 5u
, Diligent::BIND_DEPTH_STENCIL = 1u << 6u
,
Diligent::BIND_UNORDERED_ACCESS = 1u << 7u
, Diligent::BIND_INDIRECT_DRAW_ARGS = 1u << 8u
, Diligent::BIND_INPUT_ATTACHMENT = 1u << 9u
, Diligent::BIND_RAY_TRACING = 1u << 10u
,
BIND_SHADING_RATE = 1u << 11u
, BIND_FLAG_LAST = BIND_SHADING_RATE
} |
| | Resource binding flags. More...
|
| |
| enum | Diligent::USAGE : Uint8 {
Diligent::USAGE_IMMUTABLE = 0
, Diligent::USAGE_DEFAULT
, Diligent::USAGE_DYNAMIC
, Diligent::USAGE_STAGING
,
Diligent::USAGE_UNIFIED
, Diligent::USAGE_SPARSE
, Diligent::USAGE_NUM_USAGES
} |
| | Resource usage. More...
|
| |
| enum | Diligent::CPU_ACCESS_FLAGS : Uint8 { Diligent::CPU_ACCESS_NONE = 0u
, Diligent::CPU_ACCESS_READ = 1u << 0u
, Diligent::CPU_ACCESS_WRITE = 1u << 1u
, CPU_ACCESS_FLAG_LAST = CPU_ACCESS_WRITE
} |
| | Allowed CPU access mode flags when mapping a resource. More...
|
| |
| enum | Diligent::MAP_TYPE : Uint8 { Diligent::MAP_READ = 0x01
, Diligent::MAP_WRITE = 0x02
, Diligent::MAP_READ_WRITE = 0x03
} |
| | Resource mapping type. More...
|
| |
| enum | Diligent::MAP_FLAGS : Uint8 { Diligent::MAP_FLAG_NONE = 0x000
, Diligent::MAP_FLAG_DO_NOT_WAIT = 0x001
, Diligent::MAP_FLAG_DISCARD = 0x002
, Diligent::MAP_FLAG_NO_OVERWRITE = 0x004
} |
| | Special map flags. More...
|
| |
| enum | Diligent::RESOURCE_DIMENSION : Uint8 {
Diligent::RESOURCE_DIM_UNDEFINED = 0
, Diligent::RESOURCE_DIM_BUFFER
, Diligent::RESOURCE_DIM_TEX_1D
, Diligent::RESOURCE_DIM_TEX_1D_ARRAY
,
Diligent::RESOURCE_DIM_TEX_2D
, Diligent::RESOURCE_DIM_TEX_2D_ARRAY
, Diligent::RESOURCE_DIM_TEX_3D
, Diligent::RESOURCE_DIM_TEX_CUBE
,
Diligent::RESOURCE_DIM_TEX_CUBE_ARRAY
, Diligent::RESOURCE_DIM_NUM_DIMENSIONS
} |
| | Describes resource dimension. More...
|
| |
| enum | Diligent::TEXTURE_VIEW_TYPE : Uint8 {
Diligent::TEXTURE_VIEW_UNDEFINED = 0
, Diligent::TEXTURE_VIEW_SHADER_RESOURCE
, Diligent::TEXTURE_VIEW_RENDER_TARGET
, Diligent::TEXTURE_VIEW_DEPTH_STENCIL
,
Diligent::TEXTURE_VIEW_READ_ONLY_DEPTH_STENCIL
, Diligent::TEXTURE_VIEW_UNORDERED_ACCESS
, Diligent::TEXTURE_VIEW_SHADING_RATE
, Diligent::TEXTURE_VIEW_NUM_VIEWS
} |
| | Texture view type. More...
|
| |
| enum | Diligent::BUFFER_VIEW_TYPE : Uint8 { Diligent::BUFFER_VIEW_UNDEFINED = 0
, Diligent::BUFFER_VIEW_SHADER_RESOURCE
, Diligent::BUFFER_VIEW_UNORDERED_ACCESS
, Diligent::BUFFER_VIEW_NUM_VIEWS
} |
| | Buffer view type. More...
|
| |
| enum | Diligent::TEXTURE_FORMAT : Uint16 {
Diligent::TEX_FORMAT_UNKNOWN = 0
, Diligent::TEX_FORMAT_RGBA32_TYPELESS
, Diligent::TEX_FORMAT_RGBA32_FLOAT
, Diligent::TEX_FORMAT_RGBA32_UINT
,
Diligent::TEX_FORMAT_RGBA32_SINT
, Diligent::TEX_FORMAT_RGB32_TYPELESS
, Diligent::TEX_FORMAT_RGB32_FLOAT
, Diligent::TEX_FORMAT_RGB32_UINT
,
Diligent::TEX_FORMAT_RGB32_SINT
, Diligent::TEX_FORMAT_RGBA16_TYPELESS
, Diligent::TEX_FORMAT_RGBA16_FLOAT
, Diligent::TEX_FORMAT_RGBA16_UNORM
,
Diligent::TEX_FORMAT_RGBA16_UINT
, Diligent::TEX_FORMAT_RGBA16_SNORM
, Diligent::TEX_FORMAT_RGBA16_SINT
, Diligent::TEX_FORMAT_RG32_TYPELESS
,
Diligent::TEX_FORMAT_RG32_FLOAT
, Diligent::TEX_FORMAT_RG32_UINT
, Diligent::TEX_FORMAT_RG32_SINT
, Diligent::TEX_FORMAT_R32G8X24_TYPELESS
,
Diligent::TEX_FORMAT_D32_FLOAT_S8X24_UINT
, Diligent::TEX_FORMAT_R32_FLOAT_X8X24_TYPELESS
, Diligent::TEX_FORMAT_X32_TYPELESS_G8X24_UINT
, Diligent::TEX_FORMAT_RGB10A2_TYPELESS
,
Diligent::TEX_FORMAT_RGB10A2_UNORM
, Diligent::TEX_FORMAT_RGB10A2_UINT
, Diligent::TEX_FORMAT_R11G11B10_FLOAT
, Diligent::TEX_FORMAT_RGBA8_TYPELESS
,
Diligent::TEX_FORMAT_RGBA8_UNORM
, Diligent::TEX_FORMAT_RGBA8_UNORM_SRGB
, Diligent::TEX_FORMAT_RGBA8_UINT
, Diligent::TEX_FORMAT_RGBA8_SNORM
,
Diligent::TEX_FORMAT_RGBA8_SINT
, Diligent::TEX_FORMAT_RG16_TYPELESS
, Diligent::TEX_FORMAT_RG16_FLOAT
, Diligent::TEX_FORMAT_RG16_UNORM
,
Diligent::TEX_FORMAT_RG16_UINT
, Diligent::TEX_FORMAT_RG16_SNORM
, Diligent::TEX_FORMAT_RG16_SINT
, Diligent::TEX_FORMAT_R32_TYPELESS
,
Diligent::TEX_FORMAT_D32_FLOAT
, Diligent::TEX_FORMAT_R32_FLOAT
, Diligent::TEX_FORMAT_R32_UINT
, Diligent::TEX_FORMAT_R32_SINT
,
Diligent::TEX_FORMAT_R24G8_TYPELESS
, Diligent::TEX_FORMAT_D24_UNORM_S8_UINT
, Diligent::TEX_FORMAT_R24_UNORM_X8_TYPELESS
, Diligent::TEX_FORMAT_X24_TYPELESS_G8_UINT
,
Diligent::TEX_FORMAT_RG8_TYPELESS
, Diligent::TEX_FORMAT_RG8_UNORM
, Diligent::TEX_FORMAT_RG8_UINT
, Diligent::TEX_FORMAT_RG8_SNORM
,
Diligent::TEX_FORMAT_RG8_SINT
, Diligent::TEX_FORMAT_R16_TYPELESS
, Diligent::TEX_FORMAT_R16_FLOAT
, Diligent::TEX_FORMAT_D16_UNORM
,
Diligent::TEX_FORMAT_R16_UNORM
, Diligent::TEX_FORMAT_R16_UINT
, Diligent::TEX_FORMAT_R16_SNORM
, Diligent::TEX_FORMAT_R16_SINT
,
Diligent::TEX_FORMAT_R8_TYPELESS
, Diligent::TEX_FORMAT_R8_UNORM
, Diligent::TEX_FORMAT_R8_UINT
, Diligent::TEX_FORMAT_R8_SNORM
,
Diligent::TEX_FORMAT_R8_SINT
, Diligent::TEX_FORMAT_A8_UNORM
, Diligent::TEX_FORMAT_R1_UNORM
, Diligent::TEX_FORMAT_RGB9E5_SHAREDEXP
,
Diligent::TEX_FORMAT_RG8_B8G8_UNORM
, Diligent::TEX_FORMAT_G8R8_G8B8_UNORM
, Diligent::TEX_FORMAT_BC1_TYPELESS
, Diligent::TEX_FORMAT_BC1_UNORM
,
Diligent::TEX_FORMAT_BC1_UNORM_SRGB
, Diligent::TEX_FORMAT_BC2_TYPELESS
, Diligent::TEX_FORMAT_BC2_UNORM
, Diligent::TEX_FORMAT_BC2_UNORM_SRGB
,
Diligent::TEX_FORMAT_BC3_TYPELESS
, Diligent::TEX_FORMAT_BC3_UNORM
, Diligent::TEX_FORMAT_BC3_UNORM_SRGB
, Diligent::TEX_FORMAT_BC4_TYPELESS
,
Diligent::TEX_FORMAT_BC4_UNORM
, Diligent::TEX_FORMAT_BC4_SNORM
, Diligent::TEX_FORMAT_BC5_TYPELESS
, Diligent::TEX_FORMAT_BC5_UNORM
,
Diligent::TEX_FORMAT_BC5_SNORM
, Diligent::TEX_FORMAT_B5G6R5_UNORM
, Diligent::TEX_FORMAT_B5G5R5A1_UNORM
, Diligent::TEX_FORMAT_BGRA8_UNORM
,
Diligent::TEX_FORMAT_BGRX8_UNORM
, Diligent::TEX_FORMAT_R10G10B10_XR_BIAS_A2_UNORM
, Diligent::TEX_FORMAT_BGRA8_TYPELESS
, Diligent::TEX_FORMAT_BGRA8_UNORM_SRGB
,
Diligent::TEX_FORMAT_BGRX8_TYPELESS
, Diligent::TEX_FORMAT_BGRX8_UNORM_SRGB
, Diligent::TEX_FORMAT_BC6H_TYPELESS
, Diligent::TEX_FORMAT_BC6H_UF16
,
Diligent::TEX_FORMAT_BC6H_SF16
, Diligent::TEX_FORMAT_BC7_TYPELESS
, Diligent::TEX_FORMAT_BC7_UNORM
, Diligent::TEX_FORMAT_BC7_UNORM_SRGB
,
Diligent::TEX_FORMAT_ETC2_RGB8_UNORM
, Diligent::TEX_FORMAT_ETC2_RGB8_UNORM_SRGB
, Diligent::TEX_FORMAT_ETC2_RGB8A1_UNORM
, Diligent::TEX_FORMAT_ETC2_RGB8A1_UNORM_SRGB
,
Diligent::TEX_FORMAT_ETC2_RGBA8_UNORM
, Diligent::TEX_FORMAT_ETC2_RGBA8_UNORM_SRGB
, Diligent::TEX_FORMAT_NUM_FORMATS
} |
| | Texture formats. More...
|
| |
| enum | Diligent::FILTER_TYPE : Uint8 {
Diligent::FILTER_TYPE_UNKNOWN = 0
, Diligent::FILTER_TYPE_POINT
, Diligent::FILTER_TYPE_LINEAR
, Diligent::FILTER_TYPE_ANISOTROPIC
,
Diligent::FILTER_TYPE_COMPARISON_POINT
, Diligent::FILTER_TYPE_COMPARISON_LINEAR
, Diligent::FILTER_TYPE_COMPARISON_ANISOTROPIC
, Diligent::FILTER_TYPE_MINIMUM_POINT
,
Diligent::FILTER_TYPE_MINIMUM_LINEAR
, Diligent::FILTER_TYPE_MINIMUM_ANISOTROPIC
, Diligent::FILTER_TYPE_MAXIMUM_POINT
, Diligent::FILTER_TYPE_MAXIMUM_LINEAR
,
Diligent::FILTER_TYPE_MAXIMUM_ANISOTROPIC
, Diligent::FILTER_TYPE_NUM_FILTERS
} |
| | Filter type. More...
|
| |
| enum | Diligent::TEXTURE_ADDRESS_MODE : Uint8 {
Diligent::TEXTURE_ADDRESS_UNKNOWN = 0
, Diligent::TEXTURE_ADDRESS_WRAP = 1
, Diligent::TEXTURE_ADDRESS_MIRROR = 2
, Diligent::TEXTURE_ADDRESS_CLAMP = 3
,
Diligent::TEXTURE_ADDRESS_BORDER = 4
, Diligent::TEXTURE_ADDRESS_MIRROR_ONCE = 5
, Diligent::TEXTURE_ADDRESS_NUM_MODES
} |
| | Texture address mode. More...
|
| |
| enum | Diligent::COMPARISON_FUNCTION : Uint8 {
Diligent::COMPARISON_FUNC_UNKNOWN = 0
, Diligent::COMPARISON_FUNC_NEVER
, Diligent::COMPARISON_FUNC_LESS
, Diligent::COMPARISON_FUNC_EQUAL
,
Diligent::COMPARISON_FUNC_LESS_EQUAL
, Diligent::COMPARISON_FUNC_GREATER
, Diligent::COMPARISON_FUNC_NOT_EQUAL
, Diligent::COMPARISON_FUNC_GREATER_EQUAL
,
Diligent::COMPARISON_FUNC_ALWAYS
, Diligent::COMPARISON_FUNC_NUM_FUNCTIONS
} |
| | Comparison function. More...
|
| |
| enum | Diligent::PRIMITIVE_TOPOLOGY : Uint8 {
Diligent::PRIMITIVE_TOPOLOGY_UNDEFINED = 0
, Diligent::PRIMITIVE_TOPOLOGY_TRIANGLE_LIST
, Diligent::PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP
, Diligent::PRIMITIVE_TOPOLOGY_POINT_LIST
,
Diligent::PRIMITIVE_TOPOLOGY_LINE_LIST
, Diligent::PRIMITIVE_TOPOLOGY_LINE_STRIP
, Diligent::PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ
, Diligent::PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ
,
Diligent::PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ
, Diligent::PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ
, Diligent::PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST
,
Diligent::PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST
, Diligent::PRIMITIVE_TOPOLOGY_NUM_TOPOLOGIES
} |
| | Input primitive topology. More...
|
| |
| enum | Diligent::MEMORY_PROPERTIES : Uint32 { Diligent::MEMORY_PROPERTY_UNKNOWN = 0x00
, Diligent::MEMORY_PROPERTY_HOST_COHERENT = 0x01
} |
| | Memory property flags. More...
|
| |
| enum | Diligent::ADAPTER_TYPE : Uint8 {
Diligent::ADAPTER_TYPE_UNKNOWN = 0
, Diligent::ADAPTER_TYPE_SOFTWARE
, Diligent::ADAPTER_TYPE_INTEGRATED
, Diligent::ADAPTER_TYPE_DISCRETE
,
Diligent::ADAPTER_TYPE_COUNT
} |
| | Hardware adapter type. More...
|
| |
| enum | Diligent::SCALING_MODE { Diligent::SCALING_MODE_UNSPECIFIED = 0
, Diligent::SCALING_MODE_CENTERED = 1
, Diligent::SCALING_MODE_STRETCHED = 2
} |
| |
| enum | Diligent::SCANLINE_ORDER { Diligent::SCANLINE_ORDER_UNSPECIFIED = 0
, Diligent::SCANLINE_ORDER_PROGRESSIVE = 1
, Diligent::SCANLINE_ORDER_UPPER_FIELD_FIRST = 2
, Diligent::SCANLINE_ORDER_LOWER_FIELD_FIRST = 3
} |
| |
| enum | Diligent::SWAP_CHAIN_USAGE_FLAGS : Uint32 {
Diligent::SWAP_CHAIN_USAGE_NONE = 0u
, Diligent::SWAP_CHAIN_USAGE_RENDER_TARGET = 1u << 0
, Diligent::SWAP_CHAIN_USAGE_SHADER_RESOURCE = 1u << 1
, Diligent::SWAP_CHAIN_USAGE_INPUT_ATTACHMENT = 1u << 2
,
Diligent::SWAP_CHAIN_USAGE_COPY_SOURCE = 1u << 3
, SWAP_CHAIN_USAGE_LAST = SWAP_CHAIN_USAGE_COPY_SOURCE
} |
| | Defines allowed swap chain usage flags. More...
|
| |
| enum | Diligent::SURFACE_TRANSFORM : Uint32 {
Diligent::SURFACE_TRANSFORM_OPTIMAL = 0
, Diligent::SURFACE_TRANSFORM_IDENTITY
, Diligent::SURFACE_TRANSFORM_ROTATE_90
, Diligent::SURFACE_TRANSFORM_ROTATE_180
,
Diligent::SURFACE_TRANSFORM_ROTATE_270
, Diligent::SURFACE_TRANSFORM_HORIZONTAL_MIRROR
, Diligent::SURFACE_TRANSFORM_HORIZONTAL_MIRROR_ROTATE_90
, Diligent::SURFACE_TRANSFORM_HORIZONTAL_MIRROR_ROTATE_180
,
Diligent::SURFACE_TRANSFORM_HORIZONTAL_MIRROR_ROTATE_270
} |
| | The transform applied to the image content prior to presentation. More...
|
| |
| enum | Diligent::QUERY_TYPE {
Diligent::QUERY_TYPE_UNDEFINED = 0
, Diligent::QUERY_TYPE_OCCLUSION
, Diligent::QUERY_TYPE_BINARY_OCCLUSION
, Diligent::QUERY_TYPE_TIMESTAMP
,
Diligent::QUERY_TYPE_PIPELINE_STATISTICS
, Diligent::QUERY_TYPE_DURATION
, Diligent::QUERY_TYPE_NUM_TYPES
} |
| | Query type. More...
|
| |
| enum | Diligent::RENDER_DEVICE_TYPE {
Diligent::RENDER_DEVICE_TYPE_UNDEFINED = 0
, Diligent::RENDER_DEVICE_TYPE_D3D11
, Diligent::RENDER_DEVICE_TYPE_D3D12
, Diligent::RENDER_DEVICE_TYPE_GL
,
Diligent::RENDER_DEVICE_TYPE_GLES
, Diligent::RENDER_DEVICE_TYPE_VULKAN
, Diligent::RENDER_DEVICE_TYPE_METAL
, Diligent::RENDER_DEVICE_TYPE_WEBGPU
,
Diligent::RENDER_DEVICE_TYPE_COUNT
} |
| | Device type. More...
|
| |
| enum | Diligent::DEVICE_FEATURE_STATE : Uint8 { Diligent::DEVICE_FEATURE_STATE_DISABLED = 0
, Diligent::DEVICE_FEATURE_STATE_ENABLED = 1
, Diligent::DEVICE_FEATURE_STATE_OPTIONAL = 2
} |
| | Device feature state. More...
|
| |
| enum | Diligent::ADAPTER_VENDOR : Uint8 {
Diligent::ADAPTER_VENDOR_UNKNOWN = 0
, Diligent::ADAPTER_VENDOR_NVIDIA
, Diligent::ADAPTER_VENDOR_AMD
, Diligent::ADAPTER_VENDOR_INTEL
,
Diligent::ADAPTER_VENDOR_ARM
, Diligent::ADAPTER_VENDOR_QUALCOMM
, Diligent::ADAPTER_VENDOR_IMGTECH
, Diligent::ADAPTER_VENDOR_MSFT
,
Diligent::ADAPTER_VENDOR_APPLE
, Diligent::ADAPTER_VENDOR_MESA
, Diligent::ADAPTER_VENDOR_BROADCOM
, Diligent::ADAPTER_VENDOR_LAST = ADAPTER_VENDOR_BROADCOM
} |
| | Graphics adapter vendor. More...
|
| |
| enum | Diligent::WAVE_FEATURE : Uint32 |
| | Describes the wave feature types. More...
|
| |
| enum | Diligent::VALIDATION_LEVEL : Uint8 { Diligent::VALIDATION_LEVEL_DISABLED = 0
, Diligent::VALIDATION_LEVEL_1
, Diligent::VALIDATION_LEVEL_2
} |
| | Common validation levels that translate to specific settings for different backends. More...
|
| |
| enum | Diligent::RAY_TRACING_CAP_FLAGS : Uint8 { Diligent::RAY_TRACING_CAP_FLAG_NONE = 0x00
, Diligent::RAY_TRACING_CAP_FLAG_STANDALONE_SHADERS = 0x01
, Diligent::RAY_TRACING_CAP_FLAG_INLINE_RAY_TRACING = 0x02
, Diligent::RAY_TRACING_CAP_FLAG_INDIRECT_RAY_TRACING = 0x04
} |
| | Ray tracing capability flags. More...
|
| |
| enum | Diligent::VALIDATION_FLAGS : Uint32 { Diligent::VALIDATION_FLAG_NONE = 0x00
, Diligent::VALIDATION_FLAG_CHECK_SHADER_BUFFER_SIZE = 0x01
} |
| | Common validation options. More...
|
| |
| enum | Diligent::COMMAND_QUEUE_TYPE : Uint8 {
Diligent::COMMAND_QUEUE_TYPE_UNKNOWN = 0
, Diligent::COMMAND_QUEUE_TYPE_TRANSFER = 1u << 0
, Diligent::COMMAND_QUEUE_TYPE_COMPUTE = (1u << 1) | COMMAND_QUEUE_TYPE_TRANSFER
, Diligent::COMMAND_QUEUE_TYPE_GRAPHICS = (1u << 2) | COMMAND_QUEUE_TYPE_COMPUTE
,
Diligent::COMMAND_QUEUE_TYPE_PRIMARY_MASK = COMMAND_QUEUE_TYPE_TRANSFER | COMMAND_QUEUE_TYPE_COMPUTE | COMMAND_QUEUE_TYPE_GRAPHICS
, Diligent::COMMAND_QUEUE_TYPE_SPARSE_BINDING = (1u << 3)
, COMMAND_QUEUE_TYPE_MAX_BIT = COMMAND_QUEUE_TYPE_GRAPHICS
} |
| | Command queue type. More...
|
| |
| enum | Diligent::QUEUE_PRIORITY : Uint8 {
Diligent::QUEUE_PRIORITY_UNKNOWN = 0
, Diligent::QUEUE_PRIORITY_LOW
, Diligent::QUEUE_PRIORITY_MEDIUM
, Diligent::QUEUE_PRIORITY_HIGH
,
Diligent::QUEUE_PRIORITY_REALTIME
, Diligent::QUEUE_PRIORITY_LAST = QUEUE_PRIORITY_REALTIME
} |
| | Queue priority. More...
|
| |
| enum | Diligent::SHADING_RATE_COMBINER : Uint8 {
Diligent::SHADING_RATE_COMBINER_PASSTHROUGH = 1 << 0
, Diligent::SHADING_RATE_COMBINER_OVERRIDE = 1 << 1
, Diligent::SHADING_RATE_COMBINER_MIN = 1 << 2
, Diligent::SHADING_RATE_COMBINER_MAX = 1 << 3
,
Diligent::SHADING_RATE_COMBINER_SUM = 1 << 4
, Diligent::SHADING_RATE_COMBINER_MUL = 1 << 5
, SHADING_RATE_COMBINER_LAST = SHADING_RATE_COMBINER_MUL
} |
| |
| enum | Diligent::SHADING_RATE_FORMAT : Uint8 { Diligent::SHADING_RATE_FORMAT_UNKNOWN = 0
, Diligent::SHADING_RATE_FORMAT_PALETTE = 1
, Diligent::SHADING_RATE_FORMAT_UNORM8 = 2
, Diligent::SHADING_RATE_FORMAT_COL_ROW_FP32 = 3
} |
| | Shading rate texture format supported by the device. More...
|
| |
| enum | Diligent::AXIS_SHADING_RATE : Uint8 { Diligent::AXIS_SHADING_RATE_1X = 0x0
, Diligent::AXIS_SHADING_RATE_2X = 0x1
, Diligent::AXIS_SHADING_RATE_4X = 0x2
, Diligent::AXIS_SHADING_RATE_MAX = AXIS_SHADING_RATE_4X
} |
| | Specifies the base shading rate along a horizontal or vertical axis. More...
|
| |
| enum | Diligent::SHADING_RATE : Uint8 {
Diligent::SHADING_RATE_1X1 = ((AXIS_SHADING_RATE_1X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_1X)
, Diligent::SHADING_RATE_1X2 = ((AXIS_SHADING_RATE_1X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_2X)
, Diligent::SHADING_RATE_1X4 = ((AXIS_SHADING_RATE_1X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_4X)
, Diligent::SHADING_RATE_2X1 = ((AXIS_SHADING_RATE_2X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_1X)
,
Diligent::SHADING_RATE_2X2 = ((AXIS_SHADING_RATE_2X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_2X)
, Diligent::SHADING_RATE_2X4 = ((AXIS_SHADING_RATE_2X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_4X)
, Diligent::SHADING_RATE_4X1 = ((AXIS_SHADING_RATE_4X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_1X)
, Diligent::SHADING_RATE_4X2 = ((AXIS_SHADING_RATE_4X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_2X)
,
Diligent::SHADING_RATE_4X4 = ((AXIS_SHADING_RATE_4X << DILIGENT_SHADING_RATE_X_SHIFT) | AXIS_SHADING_RATE_4X)
, Diligent::SHADING_RATE_MAX = SHADING_RATE_4X4
} |
| | Defines the shading rate for both axes. More...
|
| |
| enum | Diligent::SAMPLE_COUNT : Uint8 |
| | Defines the sample count.
|
| |
| enum | Diligent::SHADING_RATE_CAP_FLAGS : Uint16 {
Diligent::SHADING_RATE_CAP_FLAG_NONE = 0
, Diligent::SHADING_RATE_CAP_FLAG_PER_DRAW = 1u << 0
, Diligent::SHADING_RATE_CAP_FLAG_PER_PRIMITIVE = 1u << 1
, Diligent::SHADING_RATE_CAP_FLAG_TEXTURE_BASED = 1u << 2
,
Diligent::SHADING_RATE_CAP_FLAG_SAMPLE_MASK = 1u << 3
, Diligent::SHADING_RATE_CAP_FLAG_SHADER_SAMPLE_MASK = 1u << 4
, Diligent::SHADING_RATE_CAP_FLAG_SHADER_DEPTH_STENCIL_WRITE = 1u << 5
, Diligent::SHADING_RATE_CAP_FLAG_PER_PRIMITIVE_WITH_MULTIPLE_VIEWPORTS = 1u << 6
,
Diligent::SHADING_RATE_CAP_FLAG_SAME_TEXTURE_FOR_WHOLE_RENDERPASS = 1u << 7
, Diligent::SHADING_RATE_CAP_FLAG_TEXTURE_ARRAY = 1u << 8
, Diligent::SHADING_RATE_CAP_FLAG_SHADING_RATE_SHADER_INPUT = 1u << 9
, Diligent::SHADING_RATE_CAP_FLAG_ADDITIONAL_INVOCATIONS = 1u << 10
,
Diligent::SHADING_RATE_CAP_FLAG_NON_SUBSAMPLED_RENDER_TARGET = 1u << 11
, Diligent::SHADING_RATE_CAP_FLAG_SUBSAMPLED_RENDER_TARGET = 1u << 12
} |
| | Defines the shading rate capability flags. More...
|
| |
| enum | Diligent::SHADING_RATE_TEXTURE_ACCESS : Uint8 { Diligent::SHADING_RATE_TEXTURE_ACCESS_UNKNOWN = 0
, Diligent::SHADING_RATE_TEXTURE_ACCESS_ON_GPU
, Diligent::SHADING_RATE_TEXTURE_ACCESS_ON_SUBMIT
, Diligent::SHADING_RATE_TEXTURE_ACCESS_ON_SET_RTV
} |
| | Defines how the shading rate texture is accessed. More...
|
| |
| enum | Diligent::DRAW_COMMAND_CAP_FLAGS : Uint16 {
Diligent::DRAW_COMMAND_CAP_FLAG_NONE = 0
, Diligent::DRAW_COMMAND_CAP_FLAG_BASE_VERTEX = 1u << 0
, Diligent::DRAW_COMMAND_CAP_FLAG_DRAW_INDIRECT = 1u << 1
, Diligent::DRAW_COMMAND_CAP_FLAG_DRAW_INDIRECT_FIRST_INSTANCE = 1u << 2
,
Diligent::DRAW_COMMAND_CAP_FLAG_NATIVE_MULTI_DRAW_INDIRECT = 1u << 3
, Diligent::DRAW_COMMAND_CAP_FLAG_DRAW_INDIRECT_COUNTER_BUFFER = 1u << 4
} |
| | Defines the draw command capability flags. More...
|
| |
| enum | Diligent::SPARSE_RESOURCE_CAP_FLAGS : Uint32 {
Diligent::SPARSE_RESOURCE_CAP_FLAG_NONE = 0
, Diligent::SPARSE_RESOURCE_CAP_FLAG_SHADER_RESOURCE_RESIDENCY = 1u << 0
, Diligent::SPARSE_RESOURCE_CAP_FLAG_BUFFER = 1u << 1
, Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_2D = 1u << 2
,
Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_3D = 1u << 3
, Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_2_SAMPLES = 1u << 4
, Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_4_SAMPLES = 1u << 5
, Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_8_SAMPLES = 1u << 6
,
Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_16_SAMPLES = 1u << 7
, Diligent::SPARSE_RESOURCE_CAP_FLAG_ALIASED = 1u << 8
, Diligent::SPARSE_RESOURCE_CAP_FLAG_STANDARD_2D_TILE_SHAPE = 1u << 9
, Diligent::SPARSE_RESOURCE_CAP_FLAG_STANDARD_2DMS_TILE_SHAPE = 1u << 10
,
Diligent::SPARSE_RESOURCE_CAP_FLAG_STANDARD_3D_TILE_SHAPE = 1u << 11
, Diligent::SPARSE_RESOURCE_CAP_FLAG_ALIGNED_MIP_SIZE = 1u << 12
, Diligent::SPARSE_RESOURCE_CAP_FLAG_NON_RESIDENT_STRICT = 1u << 13
, Diligent::SPARSE_RESOURCE_CAP_FLAG_TEXTURE_2D_ARRAY_MIP_TAIL = 1u << 14
,
Diligent::SPARSE_RESOURCE_CAP_FLAG_BUFFER_STANDARD_BLOCK = 1u << 15
, Diligent::SPARSE_RESOURCE_CAP_FLAG_NON_RESIDENT_SAFE = 1u << 16
, Diligent::SPARSE_RESOURCE_CAP_FLAG_MIXED_RESOURCE_TYPE_SUPPORT = 1u << 17
} |
| | Sparse memory capability flags. More...
|
| |
| enum | Diligent::D3D11_VALIDATION_FLAGS : Uint32 { Diligent::D3D11_VALIDATION_FLAG_NONE = 0x00
, Diligent::D3D11_VALIDATION_FLAG_VERIFY_COMMITTED_RESOURCE_RELEVANCE = 0x01
} |
| | Direct3D11-specific validation options. More...
|
| |
| enum | Diligent::D3D12_VALIDATION_FLAGS : Uint32 { Diligent::D3D12_VALIDATION_FLAG_NONE = 0x00
, Diligent::D3D12_VALIDATION_FLAG_BREAK_ON_ERROR = 0x01
, Diligent::D3D12_VALIDATION_FLAG_BREAK_ON_CORRUPTION = 0x02
, Diligent::D3D12_VALIDATION_FLAG_ENABLE_GPU_BASED_VALIDATION = 0x04
} |
| | Direct3D12-specific validation flags. More...
|
| |
| enum | Diligent::COMPONENT_TYPE : Uint8 {
Diligent::COMPONENT_TYPE_UNDEFINED
, Diligent::COMPONENT_TYPE_FLOAT
, Diligent::COMPONENT_TYPE_SNORM
, Diligent::COMPONENT_TYPE_UNORM
,
Diligent::COMPONENT_TYPE_UNORM_SRGB
, Diligent::COMPONENT_TYPE_SINT
, Diligent::COMPONENT_TYPE_UINT
, Diligent::COMPONENT_TYPE_DEPTH
,
Diligent::COMPONENT_TYPE_DEPTH_STENCIL
, Diligent::COMPONENT_TYPE_COMPOUND
, Diligent::COMPONENT_TYPE_COMPRESSED
} |
| | Describes texture format component type. More...
|
| |
| enum | Diligent::RESOURCE_DIMENSION_SUPPORT : Uint32 {
Diligent::RESOURCE_DIMENSION_SUPPORT_NONE = 0
, Diligent::RESOURCE_DIMENSION_SUPPORT_BUFFER = 1 << RESOURCE_DIM_BUFFER
, Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_1D = 1 << RESOURCE_DIM_TEX_1D
, Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_1D_ARRAY = 1 << RESOURCE_DIM_TEX_1D_ARRAY
,
Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_2D = 1 << RESOURCE_DIM_TEX_2D
, Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_2D_ARRAY = 1 << RESOURCE_DIM_TEX_2D_ARRAY
, Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_3D = 1 << RESOURCE_DIM_TEX_3D
, Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_CUBE = 1 << RESOURCE_DIM_TEX_CUBE
,
Diligent::RESOURCE_DIMENSION_SUPPORT_TEX_CUBE_ARRAY = 1 << RESOURCE_DIM_TEX_CUBE_ARRAY
} |
| | Describes device support of a particular resource dimension for a given texture format. More...
|
| |
| enum | Diligent::SPARSE_TEXTURE_FLAGS : Uint8 { Diligent::SPARSE_TEXTURE_FLAG_NONE = 0
, Diligent::SPARSE_TEXTURE_FLAG_SINGLE_MIPTAIL = 1u << 0
, Diligent::SPARSE_TEXTURE_FLAG_ALIGNED_MIP_SIZE = 1u << 1
, Diligent::SPARSE_TEXTURE_FLAG_NONSTANDARD_BLOCK_SIZE = 1u << 2
, SPARSE_TEXTURE_FLAG_LAST = SPARSE_TEXTURE_FLAG_NONSTANDARD_BLOCK_SIZE
} |
| | Describes the sparse texture packing mode. More...
|
| |
| enum | Diligent::PIPELINE_STAGE_FLAGS : Uint32 {
Diligent::PIPELINE_STAGE_FLAG_UNDEFINED = 0x00000000
, Diligent::PIPELINE_STAGE_FLAG_TOP_OF_PIPE = 0x00000001
, Diligent::PIPELINE_STAGE_FLAG_DRAW_INDIRECT = 0x00000002
, Diligent::PIPELINE_STAGE_FLAG_VERTEX_INPUT = 0x00000004
,
Diligent::PIPELINE_STAGE_FLAG_VERTEX_SHADER = 0x00000008
, Diligent::PIPELINE_STAGE_FLAG_HULL_SHADER = 0x00000010
, Diligent::PIPELINE_STAGE_FLAG_DOMAIN_SHADER = 0x00000020
, Diligent::PIPELINE_STAGE_FLAG_GEOMETRY_SHADER = 0x00000040
,
Diligent::PIPELINE_STAGE_FLAG_PIXEL_SHADER = 0x00000080
, Diligent::PIPELINE_STAGE_FLAG_EARLY_FRAGMENT_TESTS = 0x00000100
, Diligent::PIPELINE_STAGE_FLAG_LATE_FRAGMENT_TESTS = 0x00000200
, Diligent::PIPELINE_STAGE_FLAG_RENDER_TARGET = 0x00000400
,
Diligent::PIPELINE_STAGE_FLAG_COMPUTE_SHADER = 0x00000800
, Diligent::PIPELINE_STAGE_FLAG_TRANSFER = 0x00001000
, Diligent::PIPELINE_STAGE_FLAG_BOTTOM_OF_PIPE = 0x00002000
, Diligent::PIPELINE_STAGE_FLAG_HOST = 0x00004000
,
Diligent::PIPELINE_STAGE_FLAG_CONDITIONAL_RENDERING = 0x00040000
, Diligent::PIPELINE_STAGE_FLAG_SHADING_RATE_TEXTURE = 0x00400000
, Diligent::PIPELINE_STAGE_FLAG_RAY_TRACING_SHADER = 0x00200000
, Diligent::PIPELINE_STAGE_FLAG_ACCELERATION_STRUCTURE_BUILD = 0x02000000
,
Diligent::PIPELINE_STAGE_FLAG_TASK_SHADER = 0x00080000
, Diligent::PIPELINE_STAGE_FLAG_MESH_SHADER = 0x00100000
, Diligent::PIPELINE_STAGE_FLAG_FRAGMENT_DENSITY_PROCESS = 0x00800000
, Diligent::PIPELINE_STAGE_FLAG_DEFAULT = 0x80000000
} |
| | Pipeline stage flags. More...
|
| |
| enum | Diligent::ACCESS_FLAGS : Uint32 {
Diligent::ACCESS_FLAG_NONE = 0x00000000
, Diligent::ACCESS_FLAG_INDIRECT_COMMAND_READ = 0x00000001
, Diligent::ACCESS_FLAG_INDEX_READ = 0x00000002
, Diligent::ACCESS_FLAG_VERTEX_READ = 0x00000004
,
Diligent::ACCESS_FLAG_UNIFORM_READ = 0x00000008
, Diligent::ACCESS_FLAG_INPUT_ATTACHMENT_READ = 0x00000010
, Diligent::ACCESS_FLAG_SHADER_READ = 0x00000020
, Diligent::ACCESS_FLAG_SHADER_WRITE = 0x00000040
,
Diligent::ACCESS_FLAG_RENDER_TARGET_READ = 0x00000080
, Diligent::ACCESS_FLAG_RENDER_TARGET_WRITE = 0x00000100
, Diligent::ACCESS_FLAG_DEPTH_STENCIL_READ = 0x00000200
, Diligent::ACCESS_FLAG_DEPTH_STENCIL_WRITE = 0x00000400
,
Diligent::ACCESS_FLAG_COPY_SRC = 0x00000800
, Diligent::ACCESS_FLAG_COPY_DST = 0x00001000
, Diligent::ACCESS_FLAG_HOST_READ = 0x00002000
, Diligent::ACCESS_FLAG_HOST_WRITE = 0x00004000
,
Diligent::ACCESS_FLAG_MEMORY_READ = 0x00008000
, Diligent::ACCESS_FLAG_MEMORY_WRITE = 0x00010000
, Diligent::ACCESS_FLAG_CONDITIONAL_RENDERING_READ = 0x00100000
, Diligent::ACCESS_FLAG_SHADING_RATE_TEXTURE_READ = 0x00800000
,
Diligent::ACCESS_FLAG_ACCELERATION_STRUCTURE_READ = 0x00200000
, Diligent::ACCESS_FLAG_ACCELERATION_STRUCTURE_WRITE = 0x00400000
, Diligent::ACCESS_FLAG_FRAGMENT_DENSITY_MAP_READ = 0x01000000
, Diligent::ACCESS_FLAG_DEFAULT = 0x80000000
} |
| | Access flag. More...
|
| |
| enum | Diligent::RESOURCE_STATE : Uint32 {
Diligent::RESOURCE_STATE_UNKNOWN = 0
, Diligent::RESOURCE_STATE_UNDEFINED = 1u << 0
, Diligent::RESOURCE_STATE_VERTEX_BUFFER = 1u << 1
, Diligent::RESOURCE_STATE_CONSTANT_BUFFER = 1u << 2
,
Diligent::RESOURCE_STATE_INDEX_BUFFER = 1u << 3
, Diligent::RESOURCE_STATE_RENDER_TARGET = 1u << 4
, Diligent::RESOURCE_STATE_UNORDERED_ACCESS = 1u << 5
, Diligent::RESOURCE_STATE_DEPTH_WRITE = 1u << 6
,
Diligent::RESOURCE_STATE_DEPTH_READ = 1u << 7
, Diligent::RESOURCE_STATE_SHADER_RESOURCE = 1u << 8
, Diligent::RESOURCE_STATE_STREAM_OUT = 1u << 9
, Diligent::RESOURCE_STATE_INDIRECT_ARGUMENT = 1u << 10
,
Diligent::RESOURCE_STATE_COPY_DEST = 1u << 11
, Diligent::RESOURCE_STATE_COPY_SOURCE = 1u << 12
, Diligent::RESOURCE_STATE_RESOLVE_DEST = 1u << 13
, Diligent::RESOURCE_STATE_RESOLVE_SOURCE = 1u << 14
,
Diligent::RESOURCE_STATE_INPUT_ATTACHMENT = 1u << 15
, Diligent::RESOURCE_STATE_PRESENT = 1u << 16
, Diligent::RESOURCE_STATE_BUILD_AS_READ = 1u << 17
, Diligent::RESOURCE_STATE_BUILD_AS_WRITE = 1u << 18
,
Diligent::RESOURCE_STATE_RAY_TRACING = 1u << 19
, Diligent::RESOURCE_STATE_COMMON = 1u << 20
, Diligent::RESOURCE_STATE_SHADING_RATE = 1u << 21
, RESOURCE_STATE_MAX_BIT = RESOURCE_STATE_SHADING_RATE
,
RESOURCE_STATE_GENERIC_READ
} |
| | Resource usage state. More...
|
| |
| enum | Diligent::STATE_TRANSITION_TYPE : Uint8 { Diligent::STATE_TRANSITION_TYPE_IMMEDIATE = 0
, Diligent::STATE_TRANSITION_TYPE_BEGIN
, Diligent::STATE_TRANSITION_TYPE_END
} |
| | State transition barrier type. More...
|
| |
Contains basic graphics engine type definitions
